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NCP1910
V REF
R 3
BOadj
+
?
”1” BONOTOK
t BOK
t BONOTOK
LLC_BO
R 1
R 2
PFC_FB
PGadj
”1” PGNOTOK
PFC_OK
”1” is ok
”0” notok
”1” enables LLC
”0” LLC is locked
LLCenable
V SB
V CC
LLC_PG
Grand
Reset
LLC_BO
R
t DEL1
20 ms
SS is reset
R
PGout
t DEL2
PGI for
supervisory
Figure 58. The PG and BO Block Diagram for LLC
5 ms
”1” after reset
”0” when PG out
drops after 5 ms
To close switch
at SS pin
LLC Fast Fault Input (CS/FF Pin)
As shown in Figure 59, the NCP1910 offers a dedicated
input (CS/FF pin) to detect the primary over ? current
conditions and protect the power stage from damage.
Once the voltage on the CS/FF pin exceeds the threshold
of V CS1 (1 V typically), the internal switch at SS pin will be
closed to discharge C SS until V SS is below V SS_RST
(150 mV typically). Hence the switching frequency of LLC
(ML and MU) is shifted up to keep the primary current under
acceptable level.
In case of heavy overload, like transformer short circuit,
the primary current grows very fast and thus could reach
danger level. The NCP1910 therefore features additional
comparator V CS2 (1.5 V typically) at the CS/FF pin to
permanently latch the device (both PFC and LLC) and
protect against destruction.
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